4.5.0 beta16 / 23-01-2021
WinUAE is a Commodore emulator for Windows:
High accuracy and compatibility for A500, A500+, A600, A1000, A2000, CDTV
Good compatibility (Cycle-exact chipset emulation, CPU memory accesses are cycle-exact, CPU internal instruction execution speed is not exact) for A1200 and CD32
Fast CPU emulation only (chipset/chip ram CPU accesses optionally cycle-exact) for A3000, A3000T, A4000 and A4000T. To see all features, follow this link.
PPC CPU core plugin, 1.5.1+ Direct3D Pixel Shader filters, Improved drive sounds, Portaudio library
UAEUNP 0.8 to extract Amiga based disk images and archive
Windows: XP SP3 32-bit+
CPU: SSE2 capable
GPU: For Direct3D11 - Windows 7: SP1+
For Direct3D9 - June 2010 DirectX 9 redistributable required
Most Recent Changes
Hard reset leaked indirect mode allocated memory banks (outside of JIT compatible address range), for example Z3 RAM outside of partially outside of first ~2G of address space.
GUI misc list powerled dims option never worked, option was always cleared. (Only manual config file editing worked)
fix debugger command now accepts assembly syntax (for example "fi trap #0"). Only max first 3 words (if it is longer than 3 words) are used in breakpoint condition.
CPU% OSD leading zero removed.
"Blacker than black" display panel option did nothing in non-AGA modes.
68060 unimplemented integer instruction mode + unimplemented instruction with -(A7)/(A7)+ addressing mode in user mode: exception stack frame was created first, then -(A7)/(A7)+ modification was incorrectly restored using supervisor stack pointer.
68040/060 unimplemented FPU instructions also update FPIAR. Some invalid instructions don't but this seems to be undefined behavior. 6888x only update FPIAR if FPU exception(s) are enabled.
68040/060 unimplemented FPU mode arithmetic exception fixes, all 68060 FPSP test package tests now pass. (and when run using 68040 or 6888x: test errors will match real hardware 100%)
Fixed FMOVEM.L #xxx,<more than one control register> disassembly.
Windowed mode status bar height is correctly calculated when window is moved to different DPI monitor.
Removed ROM scan expansion device result list. It is out of date and code was almost unmaintainable.
Hopefully last blitter update related fix, copper blitter waits should work correcly again. (This is a hack. Copper emulation also needs an update.)
Previous Update Changes
PCI Virge emulation. Not much point but Virge emulation already existed, so... Not all byteswapping modes emulated, only what Mediator driver needs to work correctly. G-REX + Virge also works but 24-bit modes have some byteswap problems.
PCem PCI device config byte wide reads fixed (Voodoo/Virge + G-REX in CSPPC boot screen PCI list PCI device type is now shown correctly)
Voodoo 3 now works with G-REX CGX4 drivers.
G-REX didn't detect any PCI cards after FM801.
PCI RTG board native/RTG mode autoswitching improved.
Aranym JIT update missed move from FPU register to data register clamping (for example FPn -150.0 to Dn.B should become -128). Re-added.
Fixed FPU instruction JIT blacklist support.
Combitec HD 20 A/HD 40 A (not 100% sure it is exactly this model but very likely) emulation.
Another blitter/copper timing bug fix. (b12)
Combitec HD 20 A/HD 40 A:
OMTI compatible HD controller. Usual OMTI IO offset 0x641. Base address is at $800000 + autoboot ROM at $f00000.
Autoboot ROM supports autoboot under KS 1.2 (seems to use same hack that other KS 1.2 autobootable HD controller use)
Boot ROM version string: "autoboot.device (autoboot.device 6.18 (27.8.89) , Rom_1.2, FFS, Bildchen, Search, New Boot Partition Programmiert von Bernhard Möllemann & Hartmut Sprave (C) Combitec 1988,1989"
Boot screen ("COMPUTER TOP EQUIPMENT COLOSSUS(R) HD-AutoBoot")
Previous Changes Reported
Fixed possible out of bounds array access when virtual mouse driver is installed.
Added more strict coordinate/size validation to uaegfx blitter functions.
JIT shift instruction fix rewrite, they still didn't work fully correctly and my tester didn't catch them because JIT uses registers differently in different use cases etc.. But it did break most Cirrus Logic based chipset Picasso96 drivers. Corrupt icons and text, at least with some Picasso96 versions. (Still need more optimal fix later)
Improved PCem RTG mode scanline based display update timing.
CyberVision64 (S3Trio64) vsync interrupt fix, could have caused stuck interrupt when monitor driver was started.
Hardware emulated RTG boards interlace modes fixed (again).
Gaps between on screen leds are now smaller.
FAS246 SCSI chip apparently has Features Enable always set (or bit does not exist anymore). DKB RapidFire tests if transfer count high register works (write something, read it back) and assumes it is enabled without modifying Configuration 2 Register. Rapidfire worked when it first implemented because transfer count high was not originally correctly conditionally emulated. Datasheet seems to be MIA.
Fixed 32-bit Chip RAM size string array out of bounds access if 768M or 1G was selected. (b11)
Voodoo 3 byteswapped modes Mediator PCI sound card DMA hack fix.
Yet another 2D/3D registers-only Voodoo 3 byteswap mode emulated. Some W3D drivers use it. (Without it nothing was rendered and log was mostly filled with "triangle_setup wrong order" messages)
Blitter line mode was partially broken in non-cycle exact modes and CE mode wasn't fully accurate (b12). Still some edge cases to fix.
DMA debugger blitter slots are now marked as BLT-x (normal), BLF-x (fill) or BLL-x (line). x = channel. RFS, DSK, AUD, SPR and BPL slots include channel numbers. (Easier to remember than xxxDAT register address numbers)
Previous Mentioned Changes
68000/010 cycle-exact/prefetch: If long write access, - PCI Voodoo 3 3000 emulation from PCem.
Fixed existing PCI bridge emulation memory mapped space address calculations (previous PCI boards were all IO only)
According to Alice schematics, AGA delays blitter finished signal until last D write is done (2 cycles later, only if not line mode and D is enabled). Previous chipsets clear blitter busy (and trigger interrupt) when last D write still pending.
Added GVP G-Force040. Basically same as G-Force030 (same ROM, same memory config), different internal GVP hardware ID.
Fixed GUI debugger hang if something was selected in debugger and then focus was changed.
MAST Fireball DMA address pointer handling fix, some address nybbles were decoded incorrectly. (I did say it has really strange DMA address pointer setup)
PCem RTG boards didn't always refresh screen fully when switching modes.
b12 blitter fixes, start up delay was 1 cycle too long, idle cycle before final D write does not need to be free cycle.
b12 blitter fixes, blitter fill mode setup missed some conditions.
Mainboard RAM settings disappeared in b11.
GD5446 (Picasso IV) blitter fix, "Invert Color Expand Source Sense" bit was not handled correctly in all blitter modes. (For example caused MUI 3.8 "REGISTER NOW" window corruption)
16M VRAM (max supported) First hardware emulated board that supports full HD at 32-bit.
PCI board, PCI bridgeboard must be also configured.
BIOS ROM seems to be required (at least Mediator Voodoo Picasso96 driver reads some data from BIOS), currently must be in ROM path and named voodoo3.rom. Must be from PCI Voodoo 3 3000.
Native/RTG switching is implemented by checking status of SVGA screen blank bit. Might not always work correctly.
Hardware accelerated 3D confirmed working. (This is also partially JIT accelerated so it should be much faster than CV643D)
PCI to PCI DMA supported, compatible with Voodoo 3 + SB128 or FM801 sound card Mediator DMA hack.
NOTE: At least Cirrus logic based chipsets have JIT related problems (weird looking corruption if JIT is enabeld).